Conventionally, there has been known a semiconductor device which includes a shield gate structure of an in-plane direction separation type where a gate electrode and a shield electrode are separated from each other in an in-plane direction (see patent literature 1, for example).
As shown in FIG. 14A to FIG. 17C, the conventional semiconductor device 900 can be manufactured by carrying out the following method (a conventional method of manufacturing a semiconductor device). That is, the conventional semiconductor device 900 can be manufactured by carrying out (1) a semiconductor base body preparing step of preparing a semiconductor base body 910 having an n+-type first semiconductor layer 912 and an n−-type second semiconductor layer 914 having lower concentration than the first semiconductor layer 912 (see FIG. 14A), (2) a first trench forming step of forming a predetermined first trench 916 on the second semiconductor layer 914 (see FIG. 14B), (3) a first insulation film forming step of forming a first insulation film 926 in the inside of the first trench 916 by a thermal oxidation method under a condition that a first gap 922 remain at the center in the inside of the first trench 916 (see FIG. 14C), (4) a shield electrode forming step of forming a shield electrode 924 in the inside of the first gap 922 (see FIG. 14D and FIG. 15A), (5) a first insulation film etching back step of etching back the first insulation film 926 while leaving a lower portion of the first trench 916 (see FIG. 15B), (6) a gate insulation film forming step of forming a gate insulation film 918 in the inside of a recessed portion 950 under a condition that a second gap 952 remain in the inside of a recessed portion 950 formed of side walls of the shield electrode 924, side walls of an upper portion of the first trench 916 and an upper surface of the etched-back first insulation film 926 (see FIG. 15C), (7) a gate electrode forming step of forming a gate electrode 920 in the inside of the second gap 952 (see FIG. 15D and FIG. 16A), (8) a dopant region forming step of forming a base region 928, a source region 930 (first conductive-type high-concentration diffusion region) and a p+-type contact region 932 (see FIG. 16B to FIG. 16D), (9) a protective insulation film forming step of forming a protective insulation film 934 on the gate electrode 920 and the gate insulation film 918 (see FIG. 17A), (10) an insulation film removing step of removing insulation films (the gate insulation film and the protective insulation film) formed above the shield electrode 924 (see FIG. 17B), and (11) a source electrode forming step of forming a source electrode 936 such that the source electrode 936 is electrically connected to the shield electrode 924 (see FIG. 17C).